Created a rev 2 board
This commit is contained in:
184
Libraries/V3046M.lbr
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184
Libraries/V3046M.lbr
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@@ -0,0 +1,184 @@
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<!DOCTYPE eagle SYSTEM "eagle.dtd">
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</layers>
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<library>
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<packages>
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<package name="SOIC127P590X140-14N" urn="urn:adsk.eagle:footprint:25599623/1">
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<description>14-SOIC, 1.27 mm pitch, 5.90 mm span, 8.60 X 3.85 X 1.40 mm body
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<p>14-pin SOIC package with 1.27 mm pitch, 5.90 mm span with body size 8.60 X 3.85 X 1.40 mm</p></description>
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<smd name="14" x="2.4234" y="3.81" dx="1.9685" dy="0.6019" layer="1"/>
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<text x="0" y="5.4999" size="1.27" layer="25" align="bottom-center">>NAME</text>
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<text x="0" y="-5.0599" size="1.27" layer="27" align="top-center">>VALUE</text>
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</package>
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</packages>
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<packages3d>
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<package3d name="SOIC127P590X140-14N" urn="urn:adsk.eagle:package:25599609/1" type="model">
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<description>14-SOIC, 1.27 mm pitch, 5.90 mm span, 8.60 X 3.85 X 1.40 mm body
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<p>14-pin SOIC package with 1.27 mm pitch, 5.90 mm span with body size 8.60 X 3.85 X 1.40 mm</p></description>
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<packageinstances>
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<packageinstance name="SOIC127P590X140-14N"/>
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</packageinstances>
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</package3d>
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</packages3d>
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<symbols>
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<symbol name="V3046M">
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<pin name="Q1C" x="0" y="7.62" length="middle" rot="R180"/>
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<pin name="Q1B" x="0" y="5.08" length="middle" rot="R180"/>
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<pin name="Q1E/Q2E" x="0" y="2.54" length="middle" rot="R180"/>
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<pin name="Q2B" x="0" y="0" length="middle" rot="R180"/>
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<pin name="Q2C" x="0" y="-2.54" length="middle" rot="R180"/>
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<pin name="Q3B" x="0" y="-5.08" length="middle" rot="R180"/>
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<pin name="Q3E" x="0" y="-7.62" length="middle" rot="R180"/>
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<pin name="Q5C" x="10.16" y="7.62" length="middle"/>
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<pin name="Q5E" x="10.16" y="5.08" length="middle"/>
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<pin name="Q5B" x="10.16" y="2.54" length="middle"/>
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<pin name="Q4C" x="10.16" y="0" length="middle"/>
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<pin name="Q4E" x="10.16" y="-2.54" length="middle"/>
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<pin name="Q4B" x="10.16" y="-5.08" length="middle"/>
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<pin name="Q3C" x="10.16" y="-7.62" length="middle"/>
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<wire x1="0" y1="10.16" x2="0" y2="-10.16" width="0.254" layer="94"/>
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<wire x1="10.16" y1="-10.16" x2="10.16" y2="10.16" width="0.254" layer="94"/>
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<wire x1="10.16" y1="10.16" x2="0" y2="10.16" width="0.254" layer="94"/>
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<text x="0" y="10.16" size="1.27" layer="95">>NAME</text>
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<text x="0" y="-12.7" size="1.27" layer="96">>VALUE</text>
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</symbol>
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</symbols>
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<devicesets>
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<deviceset name="V3046M" uservalue="yes">
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<gates>
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<gate name="G$1" symbol="V3046M" x="-5.08" y="0"/>
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</gates>
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<devices>
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<device name="SOIC-14" package="SOIC127P590X140-14N">
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<connects>
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<connect gate="G$1" pin="Q1B" pad="2"/>
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<connect gate="G$1" pin="Q1C" pad="1"/>
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<connect gate="G$1" pin="Q1E/Q2E" pad="3"/>
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<connect gate="G$1" pin="Q2B" pad="4"/>
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<connect gate="G$1" pin="Q2C" pad="5"/>
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<connect gate="G$1" pin="Q3B" pad="6"/>
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<connect gate="G$1" pin="Q3C" pad="8"/>
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<connect gate="G$1" pin="Q3E" pad="7"/>
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<connect gate="G$1" pin="Q4B" pad="9"/>
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<connect gate="G$1" pin="Q4C" pad="11"/>
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<connect gate="G$1" pin="Q4E" pad="10"/>
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<connect gate="G$1" pin="Q5B" pad="12"/>
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<connect gate="G$1" pin="Q5C" pad="14"/>
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<connect gate="G$1" pin="Q5E" pad="13"/>
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</connects>
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<package3dinstances>
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<package3dinstance package3d_urn="urn:adsk.eagle:package:25599609/1"/>
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</package3dinstances>
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<technologies>
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<technology name=""/>
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</technologies>
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</device>
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</devices>
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</deviceset>
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</devicesets>
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</library>
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</drawing>
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<compatibility>
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<note version="8.3" severity="warning">
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Since Version 8.3, EAGLE supports URNs for individual library
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assets (packages, symbols, and devices). The URNs of those assets
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will not be understood (or retained) with this version.
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</note>
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<note version="8.3" severity="warning">
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Since Version 8.3, EAGLE supports the association of 3D packages
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with devices in libraries, schematics, and board files. Those 3D
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packages will not be understood (or retained) with this version.
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</note>
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</compatibility>
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</eagle>
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27
README.md
27
README.md
@@ -1,17 +1,30 @@
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## ZOE - Simple Saw VCO
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# ZOE - Simple Saw VCO
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** Module 1000-2_Simple Saw **
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This is a simple saw-wave generator VCO that features 1/v per octave functionality. This inital version is almost an exact rip-off of this VCO https://www.youtube.com/watch?v=rq4ovZ2om6k&t=646s, which itself is a modified version of Ray Wilson's VCO: https://www.soundtronics.co.uk/Datasheets/7210-001-VCO.pdf
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This is a simple saw-wave generator VCO that features 1/v per octave functionality. This inital version is almost an exact rip-off of this VCO https://www.youtube.com/watch?v=rq4ovZ2om6k, which itself is a modified version of Ray Wilson's VCO: https://www.soundtronics.co.uk/Datasheets/7210-001-VCO.pdf. The 2nd version is based off the saw-wave oscillator base of Jim Patchel's VCO (http://www.noniandjim.com/Jim/synthmodulesII/200-1007.pdf), with some modifications to remove obsolete or difficult to source parts.
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### TODO list/future features:
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## Revision List
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**Rev 1.0** - March 2021
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- Exact copy of the VCO by vk2seb on youtube
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**Rev 1.1** - April 2021
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- Started redrawing the schematic based on internal EAGLE blocks with multi-part compnents rather than the blocks from libraries.
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- Never finished
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**Rev 2.0** - December 2021
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- Redrew the VCO based on Jim Patchel's design, which is very similar but:
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- Uses an MAT04 (I use a MAT14 instead), as opposed to a LM3046. Both are obsolete but a replacement for the MAT04 is available.
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- Heat/Temperature compensation via LM13700 OTAs which feed the linear to exponential converter (much better performance expected)
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- Oscillator is based around an N-channel JFET instead of several BJTs and op-amps (better performance expected).
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- Elimination of several components due to simplification of the overall design
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## TODO list/future features:
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*For a more complete list, please see the projects page*
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- Proper labels for all the potentiometers
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- Standardized package for all the resistors (it looks like I am using two different packages)
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- Standardized potentiometers (looks like I am using two different styles of potentiometer)
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- ZOE interface (the large 50-pin ribbon connector I like)
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- Bill of Materials
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- Documentation on how the oscillator actually works.
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### Notes:
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## Notes:
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This VCO conforms to the dimesnions of a Eurocard (100mm x 100mm).
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By extension, it conforms to the Eurorack modular synthsizor convention, where the PCB is inside the rack and the connectors are sticking out the front. Due to this layout, the VCO could either be a 1u or 2u module depending on how you want to connect the panel components.
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BIN
Rev 1.1/Schem_Photo.png
Normal file
BIN
Rev 1.1/Schem_Photo.png
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After Width: | Height: | Size: 364 KiB |
23492
Rev 1.1/Schematic(1).s#2
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23492
Rev 1.1/Schematic(1).s#2
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23509
Rev 1.1/Schematic.s#1
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23509
Rev 1.1/Schematic.s#1
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23335
Rev 1.1/Schematic.s#3
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23335
Rev 1.1/Schematic.s#3
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23487
Rev 1.1/Schematic.sch
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23487
Rev 1.1/Schematic.sch
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3245
Rev 2.0/SawOscillator.brd
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3245
Rev 2.0/SawOscillator.brd
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22307
Rev 2.0/SawOscillator.sch
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22307
Rev 2.0/SawOscillator.sch
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16
eagle.epf
16
eagle.epf
@@ -267,18 +267,20 @@ UsedLibraryUrn="urn:adsk.eagle:library:196"
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UsedLibraryUrn="urn:adsk.eagle:library:197"
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||||
UsedLibraryUrn="urn:adsk.eagle:library:198"
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||||
UsedLibraryUrn="urn:adsk.eagle:library:199"
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UsedLibraryUrn="urn:adsk.eagle:library:525"
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||||
UsedLibrary="C:/Users/Torin Zaugg/Documents/EAGLE/libraries/3266W-1-102LF.lbr"
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||||
UsedLibrary="C:/Users/Torin Zaugg/Documents/EAGLE/libraries/OKR-T_1.5-W12-C.lbr"
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UsedLibraryUrn="urn:adsk.eagle:library:16179983"
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||||
UsedLibrary="C:/Program Files/Autodesk/EAGLE 9.2.2/lbr/Bourns_By_element14_Batch_1.lbr"
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UsedLibrary="REF102AU.lbr"
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UsedLibrary="TL074IDR.lbr"
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UsedLibrary="TL072ACD.lbr"
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||||
UsedLibrary="V3046M 2.lbr"
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UsedLibraryUrn="urn:adsk.eagle:library:525"
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||||
UsedLibrary="C:/Users/Torin Zaugg/iCloudDrive/Documents/EAGLE/libraries/ForSynthProjects/Connectors/AudioJack.lbr"
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||||
UsedLibrary="C:/Users/Torin Zaugg/iCloudDrive/Documents/EAGLE/libraries/ForSynthProjects/OpAmps/LM13700M.lbr"
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||||
UsedLibrary="C:/Users/Torin Zaugg/iCloudDrive/Documents/EAGLE/libraries/ForSynthProjects/Potentiometers/Bourns_PDB12_Zaugg.lbr"
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||||
UsedLibrary="C:/Users/Torin Zaugg/iCloudDrive/Documents/EAGLE/libraries/ForSynthProjects/SBH11-PBPC-D25-ST-BK.lbr"
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||||
UsedLibrary="C:/Users/Torin Zaugg/iCloudDrive/Documents/EAGLE/libraries/ForSynthProjects/FETs/J111 2.lbr"
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||||
|
||||
[Win_1]
|
||||
Type="Control Panel"
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||||
Number=0
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||||
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||||
[Desktop]
|
||||
Screen="1680 1050"
|
||||
Screen="3840 1080"
|
||||
Window="Win_1"
|
||||
|
||||
Reference in New Issue
Block a user